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[source in ebook256点FFT源代码

Description: 256点FFT IP核。包括16bit和8bit两种精度和C、VHDL、Verilog三种语言的多版本、多精度的IP核
Platform: | Size: 352372 | Author: ykletter@163.com | Hits:

[source in ebook512点FFT

Description: 512点FFT IP核。包括C、VHDL和Verilog三种语言版本,8bit与16bit两种精度。
Platform: | Size: 410745 | Author: ykletter@163.com | Hits:

[OtherFFT16

Description: 基于FPGA的16点FFT快速傅立叶变换的Verilog源代码。-the FFT implement of Verilog based on FPGA
Platform: | Size: 2048 | Author: lsd | Hits:

[VHDL-FPGA-Verilog基于CORDIC算法的FFT

Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机(CORDIC)算法实现了一个FFT实时谱分析系统。-time selected by using the four-situ algorithm and coordinate rotation digital computer (CORDIC) algorithm is one is a real-time FFT spectrum analysis system.
Platform: | Size: 2048 | Author: 张志华 | Hits:

[VHDL-FPGA-VerilogVERcf_fft_1024_8

Description: 1024点8位FFT的Verilog语言实现-1024-point FFT eight Verilog language
Platform: | Size: 11264 | Author: 郭子荣 | Hits:

[VHDL-FPGA-VerilogVHDcf_fft_1024_8

Description: 1024点8位FFT的VHDL语言实现方式,大家可以参考一下。-1024-point FFT eight VHDL way, we can take a look.
Platform: | Size: 12288 | Author: 郭子荣 | Hits:

[VHDL-FPGA-Verilogfftmatlab

Description: fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 7168 | Author: zqh | Hits:

[Other1_060726205935

Description: fft vhdl 1024 ty5d qaz
Platform: | Size: 30720 | Author: | Hits:

[VHDL-FPGA-Verilogverilog_Divide

Description: 这是我下的一个用verilog实现的除法代码-This is the one I use to achieve the verilog code division
Platform: | Size: 7168 | Author: | Hits:

[matlabfft

Description: matlab编写的基-2fft快速付里叶算法程序,输入倒位序,输出自然顺序。-Matlab prepared by the base-2fft fast Fourier algorithm procedures inversion input sequence, Output of natural order.
Platform: | Size: 12288 | Author: luzi | Hits:

[VHDL-FPGA-Verilog2C35F672_FFT

Description: 在Altera芯片2C35F672平台上的FFT程序,采用DSPBuilder5.0,生成Verilog文件。开发环境:QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
Platform: | Size: 474112 | Author: lovenevol | Hits:

[VHDL-FPGA-Verilogfft_IPcore

Description: 这是一个fft的IP核,安装要求为quartus6.0以上。解压安装后可在quartus里例化使用,元件主要为cyclone和stratix,最大支持1024点的转换。
Platform: | Size: 8719360 | Author: 李杰 | Hits:

[Data structscf_fft_2048_18

Description: 2048点的fft的算法源程序,应用verilog编程实现。-2048 point fft algorithm source code, application programming Verilog.
Platform: | Size: 1575936 | Author: 罗伟 | Hits:

[VHDL-FPGA-VerilogFFT_0f_FPGA_Design

Description: FFT处理器的FPGA设计,详细论证设计方案,希望对大家有所帮助。-FFT processor, FPGA design, detailed design verification program, and they hope to be helpful to everyone.
Platform: | Size: 122880 | Author: | Hits:

[VHDL-FPGA-Verilogfftverilog

Description: 关于FFT实现的Verilog代码,-FFT realize on the Verilog code,
Platform: | Size: 410624 | Author: | Hits:

[DSP programfft

Description: fpga,fft, verilog HDL codes
Platform: | Size: 5583872 | Author: mrv | Hits:

[OtherFFT v1

Description: IP core fft verilog code example
Platform: | Size: 5766144 | Author: mrv | Hits:

[Other128点FFT

Description: 128点基8的快速傅里叶变换的verilog代码(Verilog code of fast Fourier transform based on 128 point base 8)
Platform: | Size: 231424 | Author: helimpopo | Hits:

[VHDL-FPGA-VerilogAlter官方FFT程序(使用Verilog编写)

Description: 其主要使用verilog编写fft程序主体,之后通过quartus和matlab实现对fft程序的测试,可以很好做到自动化验证(The main use of verilog prepared fft main program, and then achieved by quartus and matlab fft program testing, you can do a good job of automated verification)
Platform: | Size: 995328 | Author: 未曾走远 | Hits:

[VHDL-FPGA-Verilog128点 基8 FFT

Description: 使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)
Platform: | Size: 241664 | Author: 用心的小白 | Hits:
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